(1) Field of the Invention
The present invention relates to a semiconductor device, and more particularly to the semiconductor device which is operated in synchronism with an internal clock or an external one.
(2) Description of the Related Art
One typical example of a semiconductor device that is operated in synchronism with a clock is a microcomputer. Such semiconductor device can connect a crystal oscillator with itself externally, by which the clock is generated inside the device.
FIG. 10 shows a crystal oscillating circuit included in the conventional semiconductor device. A semiconductor device 100 includes crystal oscillating terminals X0 and X1 to which a crystal oscillator is connected externally and a crystal oscillating circuit 101 for generating an internal clock. The connection of the crystal oscillator with the crystal oscillating terminals X0 and X1 causes the crystal oscillating circuit 101 to generate the internal clock. The crystal oscillating circuit 101 is designed to oscillate stably in the assumed frequency range of the crystal oscillator.
The crystal oscillating circuit 101 is composed of FET transistors Q3 and Q4, an inverter circuit Z7, a NAND circuit Z8, and a Schmitt trigger circuit Z9. The FET transistors Q3 and Q4 are n-channel and p-channel FET transistors, respectively. When an H-level (simply referred to as H) signal is inputted into a signal line S, the source of the FET transistor Q3 is connected with the drain of the FET transistor Q4. This connection causes the crystal oscillator connected with the crystal oscillating terminals X0 and X1 to have a feedback circuit composed of the FET transistors Q3 and Q4 in parallel.
The crystal oscillating circuit 101 is operated to generate a clock depending on the predetermined relation between an on resistance (feedback resistance) between the source of the FET transistor Q3 and the drain of the FET transistor Q4 and a vibrating frequency. Since the on resistance between the source of the FET transistor Q3 and the drain of the FET transistor Q4 is fixed, the crystal oscillator to be connected with the crystal oscillating terminals X0 and X1 is uniquely defined.
In the circuit shown in FIG. 10, it is assumed that the H signal is on the signal line S and an L-level (simply referred to as L) signal takes place in the crystal oscillating terminal X1. In this case, the NAND circuit Z8 supplies the H signal. The H signal is inputted again into the NAND circuit Z8 through the crystal oscillator connected with the crystal oscillating terminals X0 and X1. Then, the NAND circuit Z8 supplies the L signal. The series of operations are repeated so that the NAND circuit Z8 alternately supplies the H signal and the L signal. The Schmitt trigger circuit Z9 shapes this signal and then supplies the shaped signal as the internal clock.
In a case that the semiconductor device is operated or tested at a fast speed, the higher clock than the assumed frequency of the crystal oscillator is inputted into the crystal oscillating terminals X0 and X1. However, when the fast clock is inputted therein, the gate delay of the NAND circuit Z8 does not become negligible with respect to the frequency, so that the Schmitt trigger circuit Z4 can not supply the corresponding clock with the frequency of the inputted clock. Hence, an inverter circuit is connected with one of the crystal oscillating terminals so that the inverted fast clock may be inputted to the device. FIG. 11 is a block diagram showing the semiconductor device in which a crystal oscillator terminal is connected with an inverter circuit. A fast external clock 102 supplies faster clock than the internal clock of the semiconductor device 100. An inverter circuit Z10 is connected with the crystal oscillating terminal X1 of the semiconductor device 100 so that the fast clock can be inputted into the crystal oscillating terminal X0 and the inverted fast clock is inputted into the crystal oscillating terminal. These inputs allow the delay of the feedback gate to be cancelled.
However, disadvantageously, the inverter circuit to be connected for the purpose of inputting the fast clock into the crystal oscillating terminal increases the number of necessary components and the mounting area.
It is desired to develop a semiconductor device having a new input terminal apart from the crystal oscillating terminal for inputting the external clock and a using information signal indicating whether or not the external clock is to be used and in which the input terminal is used as a terminal for inputting the external clock and the using information signal. Thereby, the increase of the terminal in number will be suppressed.